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| 1 www.semtech.com SC2545 high performance wide input range dual synchronous buck controller power management revision: august 10, 2005 description features typical application circuit ? independent dual-outputs ? ? peel off ? start up trackingindependent dual-outputs ? wide input voltage range: 4.5v~28v ? adjustable output voltage down to 0.75v ? flexible power sequencing with enable and power good output ? synchronous buck topology with voltage mode control ? out of phase operation to reduce cost of input capacitor ? 10v internal regulator for gate driver to deliver high efficiency ? programmable switching frequency: 100khz~300khz ? full protection: uvlo, ovp and programmable ocp ? no need for current sense resistor ? low shutdown current (100na typical) ? 24 lead tssop and mlpq packages ? fully weee and rohs compliant applications ? systems with 4.5v~28v input ? lcdtv and pdptv ? network and telecom systems pinout shown as tssop-24. the SC2545 is a high performance dual pwm controller. it is designed to convert a wide ranged input voltage down to two independent output rails. the SC2545 support ? peel off ? tracking for the two outputs at start up which means the two outputs ramp up together till the one with lower output level reaching the regulation. the pwm operations of the two channels are 180 degree out of phase which can greatly reduce the size and the cost of the input capacitors. synchronous buck pwm topology and voltage mode control allow high efficiency operation, fast transient responses, and flexible component selec- tion for easy designs. a 10v internal linear regulator pro- vides the bias for the controller, and this voltage is opti- mized for gate drivers to deliver high efficiency. the power sequencing is fully supported including independent start up, and power good output. in the shut down mode the controller only draws 100na from the supply. the con- troller also offers full protection features for the condi- tions of under voltage, over voltage, and the over current. there is no need for a current sensing resistor because the mosfet on resistance is used for the sensing element. the switching frequency is adjustable from 100 khz to 300 khz. two packages tssop-24 and mlpq-24 are offered. vo1 vin+ vo1 vin+ fb1 fb1 pwgrd fb2 fb2 vcc vcc enable vo2 vin 1 vcc 2 en 3 fb1 4 errout1 5 ss1 6 ilim1 7 bst1 8 drvh1 9 phase1 10 drvl1 11 agnd 24 rosc 23 pwrgd 22 fb2 21 errout2 20 ss2 19 ilim2 18 drvh2 16 drvl2 14 pvcc 13 pgnd 12 phase2 15 bst2 17 SC2545 vin+
2 ? 2005 semtech corp. www.semtech.com SC2545 power management absolute maximum ratings electrical characteristics r e t e m a r a ps n o i t i d n o c t s e tn i mp y tx a mt i n u t u o k c o l e g a t l o v r e d n u d l o h s e r h t t r a t sg n i s i r c c v5 . 4v s i s e r e t s y h o l v ug n i l l a f c c v0 0 2v m y l p p u s r e w o p i ( t n e r r u c g n i t a r e p o in i - c c v p )f , h g i h = n e / 2 s s / 1 s s s z h k 0 0 2 =0 . 60 1a m d e t a l u g e r c c vv 2 1 > n i v0 1v l e v e l n o i t a l u g e r d a o l c c va m 0 2 ~ 0 = d a o l _ i2% n o i t a l u g e r e n i l c c vv 4 2 ~ 2 1 = n i v2% t n e r r u c g n i t a r e p o c c v pg l n o f n 1 , g h n o f n 1 , z h k 0 0 24 1a m t n e r r u c t n e c s e i u q e l b a s i dw o l = n e1 . 00 1a u t u p t u o r e h c t i w s n i a m n o i t a l u g e r e n i lv 8 2 < n i v < v 55 . 0% n o i t a l u g e r d a o la 0 1 < t n e r r u c d a o l < a 05 . 0% y c a r u c c a e g a t l o v t u p t u o, n o i t a u n e t t a k c a b d e e f t u o h t i w t a 0 4 - = o 5 8 + o t c o c 5 3 7 . 00 5 7 . 05 6 7 . 0v r e t e m a r a p l o b m y sm u m i x a ms t i n u d n g p o t 2 t s b , 1 t s bv t s b 8 3v d n g p o t n i vv n i 8 2v d n g p o t n e d n a 2 m i l i , 1 m i l i n i vv d n g p o t c c v p d n a c c v 4 1v d n g a o t d n g p 3 . 0 - / +v 2 h p o t 2 h v r d , 1 h p o t 1 h v r d , 2 h p o t 2 t s b , 1 h p o t 1 t s b 4 1 o t 3 . 0 -v d n g p o t 2 l v r d , 1 l v r d c c v o t 3 . 0 -v e g a t l o v k a e p , ) s n 0 0 1 ( e s l u p d n g a o t l v r d , e s a h p 3 -v d n g a o t s n i p r e h t o l l a c c v o t 3 . 0 -v e g n a r e r u t a r e p m e t e g a r o t st g t s 0 5 1 + o t 0 6 - o c e r u t a r e p m e t n o i t c n u j t j 0 5 1 + o t 0 4 - o c 4 2 - p o s s t r o f c e s 0 1 ) g n i r e d l o s ( e r u t a r e p m e t d a e l 4 2 - q p l m r o f ) w o l f e r r i ( e r u t a r e p m e t d a e lt d a e l 0 6 2 o c e s a c o t n o i t c n u j e c n a t s i s e r l a m r e h t 4 2 - p o s s t 4 2 - p l m c j 3 2 2 o w / c t n e i b m a o t n o i t c n u j e c n a t s i s e r l a m r e h t 4 2 - p o s s t 4 2 - p l m a j 8 7 5 2 o w / c ) l e d o m y d o b n a m u h ( g n i t a r d s e d s ed b tv k unless specified: t a = 25 o c, v in =16v, fs=200khz . exceeding the specifications below may result in permanent damage to the device, or device malfunction. operation outside of the parameters specified in the electrical characteristics section is not implied. note: this device is esd sensitive. use of standard esd handling precautions is required. ! " # $% ! & ' "( ) * " + , "& - " .'/ 0 % / *#1 # 2( 3 % 45% 4% 4% 6 7" ! ' &8" 4 7 "98"7" 5.:; ' # <"1 $ ! $/##""+ " $ < )=. ' 9 4% / > #9 $ 5 1:; ' #" / > #9 #2451':. $4% $ % 1:; ' #" ) 1 5 ' #" 9 $ 6&6. # ? $ $$ ! 6&6.' )=.$@.a" 9 9# #2451':. ? b )=.$@."" 9 9# #2451':. b ! "### $%& ' ( )* !"!# $ $%& ' & (( "!!# $ $%& ' ) * +, - -()( . & )/ ( . *" - -()( . &01&0 . 23 - -()( . &01&04 (( . 3 ,5 ),((5 6 7 8 9 ( )* +! ! " # $ % & % " ' ! " ! ( )* %++,- % '!. ! / ( 0 !! !! (12 3 2 ' ' ' " 4 56 ( 0 !! 78( % ! " * * !! !! ! 0 !! " ! ! !! 9 2+8 1 6, )% " 2+8 78( % 7 2+5 5" 712 7" "3 $ 7 "3 2+5 5"3 78( % 7 / 2+8 1 6, )% ,-7- " 2+8 4 * * !! !! ,-7- ! 0 !! " ! ! !! 56 ( 0 !! 78( % ! " 9 ( 0 !! !! (12 3 2 ' ' ' " %++,- % '!. ! )* 7&+12 , ! ! " " ' " " $ +, ( (12 ! :! (12 ( !! ! " # $ !%& $$ $'$ & $ ( $ ) * + ,-,. ! " $ $ # $ /0! $$ $#) 1 $ $ # # 2 " $ $) ( 3 &*0 % # $ # . 45 #$ $ ) &*0 6 /0! /$ # 4 &*- -) $ # # 7 /%& /) # )'$ # # $ 5 /*22 ( )'$ # # $ &*- -)'$ # # /0! /$ # &*0 % # $ # . 45 #$ $ ) &*0 + $ $ # # 2 " $ $) ( 1 ,-,. ! " $ $ # $ /0! $$ $#) 3 ! " # $ !%& $$ $'$ & $ ( $ ) * 6 4 7 /8%& , $ ( # ) ) $ ) ) # $# 5 2 ! $ $ $ !%& $$ $ 9 ( !%& ! $ # # $($ # *, , $ ( $ +1* 4* *22 5* ( # $ 2 *, ) * :5* + 8 $ ) $ # $ # ( $#) $ 55 ! 7 ? 2005 semtech corp. www.semtech.com SC2545 power management block diagram (one pwm channel shown) phase1 ocp ocp fb1 ovp ovp oscillator ramp generator clk1 ramp1 s r q + 3 - 2 pwm 1 pvcc r + - out r vcc + - out vin enable 0.75v 0.675v + - out - + - out r s /q protect 1 agnd uvlo pwrgd protect 1 fb1 fb2 pvcc clamp 0.65v 0.75v fb e/a phase drvh bst drvl pvcc errout rosc ss fb 10v ldo 0.75v en on/off uvlo vcc 10u a vcc + - out protect 1 vcc gap 1 band gap 2 band ilim 0.89v + - out 8 ? 2005 semtech corp. www.semtech.com SC2545 power management overview overview overview overview overview the SC2545 is a constant frequency 2-phase voltage mode step-down pwm switching controller driving all n- channel mosfets. the two channels of the controller operate at 180 degree out of phase from each other. since input currents are interleaved in a two-phase converter, input ripple current is lower and smaller input capacitance can be used for filtering. also, with lower inductor current and smaller inductor ripple current per phase, overall i 2 r losses are reduced. f f f f f req req req req req uency se uency se uency se uency se uency se tting tting tting tting tting the frequency of the SC2545 is user- programmable. the oscillator of SC2545 can be programmed with an external resistor from the rosc pin to the ground. the step-down controller is capable of operating up to 300khz. the relationship between oscillation frequency versus oscillation resistor is shown in figure 1. the advantages of using constant frequency operation are simple passive component selection and ease of feedback compensation. before setting the operating frequency, the following trade-offs should be considered. 1) passive component size 2) circuitry efficiency 3) emi condition 4) minimum switch on time 5) maximum duty ratio for a given output power, the sizes of the passive components are inversely proportional to the switching frequency, whereas mosfets/diodes switching losses are proportional to the operating frequency. other issues such as heat dissipation, packaging and cost issues are also to be considered. the frequency bands for signal transmission should be avoided because of em interference. 50 100 150 200 250 300 350 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 ros c (kohm) fsw(khz) figure 1. switching frequency versus rosc. this soft start scheme will ensure the duty cycle to increase slowly, therefore limiting the charging current into the output capacitor and also ensuring the inductor does not saturate. the soft start capacitor will eventually be charged up to 2.5v. the soft-start sequence is initiated when en pin is high and vcc >4.5v or during recovery from a fault condition ( ocp, ovp, or uvlo). the period of start up can be programed by the soft start capacitor: a v css tss 84 5 . 2 = sof sof sof sof sof t star t star t star t star t star t and t and t and t and t and ? p p p p p eel of eel of eel of eel of eel of f f f f f ? t t t t t racking racking racking racking racking during start-up, the reference voltage of the error amplifier equals 30% of the voltage on css (soft-start capacitor) which is connected between the ss pin and ground. when the controller is enabled (by pulling en pin high), one internal 84ua current source, i ss, (soft start current) will charge the soft-start capacitor gradually. the pwm output starts pulsing when the soft start voltage reaches 1v. shutdown shutdown shutdown shutdown shutdown when the en pin is pulled low, an internal 15ua current source discharges the soft-start capacitor and drvh/ drvl signals stop pulsing. the output voltage ramps down at a rate determined by the load condition. the SC2545 can also be shutdown by pulling down directly on the ss pin. the designer needs to consider the slope of the ss pin voltage and choose a suitable pull down resistor to prevent the output from undershooting. shutdown can also be triggered when an ocp condition occurs. when an ocp condition is detected, drvh and drvl will stop pulsing and enter a ?tri-state shutdown? with the output voltage ramping down at a rate deter- mined by the load condition. the internal 15ua current source will begin discharging the soft-start capacitor and when the soft-start voltage reaches 0.65v, drvl will go high. applications information by tieing the two soft start pins together, the two output rails track each other at start up till the rail with lower set level reaching regulation. please refer the waveform on page 20. 9 ? 2005 semtech corp. www.semtech.com SC2545 power management the inductor current is sensed by using the low side mosfet r ds(on) . after low side mosfet is turned on, the ocp comparator starts monitoring the voltage drop across the mosfet. the ocp trip level is pro- grammed by the resistor from the ilim pin to the phase node. there is an internal current source that flows out of the ilim pin which will generate a voltage drop on the setting resistor. when the sum of the setting resistor voltage and the mosfet drain to source voltage is less then zero, the ocp condition will be flagged. this functionality is depicted in figure 2. the following formula is used to set the ocp level figure 2. block diagram of over current protection. figure 3. ocp comparator timing chart. over current protection (ocp) over current protection (ocp) over current protection (ocp) over current protection (ocp) over current protection (ocp) _ () 10 ilim l peak ds on ar i r = when ocp is tripped, both high side and low side mosfets will be turned off and this condition is latched. at the same time, the soft start cap will be discharged by the internal current source of 15ua. when the vss drops bellow 0.65v, the drvl pin will go high again. to avoid switching noise during the phase node commutation, a 100ns blanking time is built in after the low side mosfet is turned on, as shown in fig. 3. 10ua ocp drvl ilim + - out output vcc drvh u u u u u nder v nder v nder v nder v nder v oltage lock out (uvl oltage lock out (uvl oltage lock out (uvl oltage lock out (uvl oltage lock out (uvl o) o) o) o) o) the uvlo circuitry monitors vcc and the soft start begins once vcc ramps up above 4.5v. there is a built in 200mv hysteresis for the uvlo ramp down threshold. the gate driver output will be in ?tri-state? (both high side and low side mosfet off) once vcc ramps down bellow 4.2v (typical), and the soft start cap will be discharged by internal 15ua current sink. ov ov ov ov ov er v er v er v er v er v oltage pr oltage pr oltage pr oltage pr oltage pr o o o o o t t t t t ection (o ection (o ection (o ection (o ection (o vp) vp) vp) vp) vp) the ovp circuitry monitors the feedback voltages, if either feedback voltage exceeds 0.89v, the ovp condition is registered. under this condition, the drvh pins will be pulled low, and the drvl pins will be pulled high. this will create a ?crow bar? condition for the input power rail in case the high side mosfet is failed short. the crow bar operation may trip the input supply to prevent the load from seeing more voltage. power good output power good output power good output power good output power good output the power good is an open collector output. the pwrgd pin is pulled low at start up if any of the two feedback voltages below 90% of its regulation level. the ramp down threshold of the signal is 80% of the regulation target. external pull up is required for the pwrgd pin, and the pull up resistor should be chosen such that the pin does not sink more than 2ma when pwrgd is low. tg i l 100ns blanking ocp active tg i l 100ns blanking ocp active applications information (cont.) ! "#$ $ $ % & '#( " # )#( " # *#! " # # + ,( -#. /#0 1# 2 % & ! &0 0 ! " 2%% 2#& 3 ( & ( & ( " 2%% 2#& 3 4 " # & , 5 & (" # & " 6# . & 7 % .)- - % "..,# 6 3. 7 2 . 3. . "5 # . 2%% 2 % )89 *89 " 2%% 2# : $ 2 "';6)#:! , # ! & *88 2<=$ $ >%, % % *88 2<= # & %% ? " # 3. ! % 3. #. & '- 2 11 ? 2005 semtech corp. www.semtech.com SC2545 power management the first term is the dc voltage across c o at time t=0 . the second term is the voltage variation caused by the charge balance between the load and the converter output. the third term is voltage ripple due to esl and the fourth term is the voltage ripple due to esr. the total output voltage ripple is then a vector sum of the last three terms. since the inductor current is a triangular waveform with peak-to-peak value * i o , the ripple-voltage caused by inductor current ripples is , f c 8 i v s o o c ? the ripple-voltage due to esl is the voltage rating of aluminum capacitors should be at least 1.5 v o . the rms current ripple rating should also be greater than usually it is necessary to have several capacitors of the same type in parallel to satisfy the esr requirement. the voltage ripple caused by the capacitor charge/ discharge should be an order of magnitude smaller than the voltage ripple caused by the esr. to guarantee this, the capacitance should satisfy . r f 2 10 c esr s o > in many applications, several low esr ceramic capacitors are added in parallel with the aluminum capacitors in order to further reduce esr and improve high frequency decoupling. because the values of capacitance and esr are usually different in ceramic and aluminum capacitors, the following remarks are made to clarify some practical issues. , d i f l v o s esl esl = ? . i r v o esr esr = ? and the esr ripple-voltage is aluminum capacitors (e.g. electrolytic) have high capacitances and low esls. the esr has the dominant effect on the output ripple voltage. it is therefore very important to minimize the esr. other types to choose are solid os-con, poscap, and tantalum. when determining the esr value, both the steady state ripple-voltage and the dynamic load transient need to be considered. to meet the steady state output ripple- voltage spec, the esr should satisfy e1 r o sr o v i ? ? to limit the dynamic output voltage overshoot/ undershoot within a (say 3%) of the steady state output voltage from no load to full load, the esr value should satisfy then, the required esr value of the output capacitors should be r esr = min{r esr1 ,r esr2 }. . 3 2 i o remark 1: high frequency ceramic capacitors may not carry most of the ripple current. it also depends on the capacitor value. only when the capacitor value is set properly, the effect of ceramic capacitor low esr starts to be significant. for example, if a 10 f, 4m ? ceramic capacitor is connected in parallel with 2x1500 f, 90m ? electrolytic capacitors, the ripple current in the ceramic capacitor is only about 42% of the current in the electrolytic capacitors at the ripple frequency. if a 100 f, 2m ? ceramic capacitor is used, the ripple current in the ceramic capacitor will be about 4.2 times of that in the electrolytic capacitors. when two 100 f, 2 m ? ceramic capacitors are used, the current ratio increases to 8.3. in this case most of the ripple current flows in the ceramic decoupling capacitor. the esr of the ceramic capacitors will then determine the output ripple-voltage. remark 2: the total equivalent capacitance of the filter bank is not simply the sum of all the paralleled capacitors. the total equivalent esr is not simply the parallel combination of all the individual esr?s either. instead they should be calculated using the following formula. e2 3% r o sr o v i ? applications information (cont.) ) b 1 a 1 b 1 a 1 2 b 1 2 b 1 a 1 2 a 1 2 b 1 a 1 2 b 1 2 a 1 2 2 b 1 a 1 ) ( eq c c ( c c ) c r c r ( ) c c ( c c ) r r ( c + + + + + + = 12 ? 2005 semtech corp. www.semtech.com SC2545 power management req and ceq are both functions of frequency. for rigorous design, the equivalent esr should be evaluated at the ripple frequency for voltage ripple calculation when both ceramic and electrolytic capacitors are used. if r 1a = r 1b = r 1 and c 1a = c 1b = c 1 , then r eq and c eq will be frequency- independent and r eq = 1/2 r 1 and c eq = 2c 1 . where r 1a and c 1a are the esr and capacitance of electrolytic capacitors, and r 1b and c 1b are the esr and capacitance of the ceramic capacitors, respectively (figure 5). figure 5. equivalent rc branch. in figure 6 the dc input voltage source has an internal impedance r in and the input capacitor c in has an esr of r esr . mosfet and input capacitor current waveforms, esr voltage ripple and input voltage ripple are shown in figure 7. input capacitor (cin) input capacitor (cin) input capacitor (cin) input capacitor (cin) input capacitor (cin) the input supply to the converter usually comes from a pre-regulator. since the input supply is not ideal, input capacitors are needed to filter the current pulses at the switching frequency. a simple buck converter is shown in figure 6. c1a c1b ceq r1a r1b req figure 6. a simple model for the converter input. figure 7. typical waveforms at converter input. it can be seen that the current in the input capacitor pulses with high di/dt. capacitors with low esl should be used. it is also important to place the input capacitor close to the mosfets on the pc board to reduce trace inductances around the pulse current loop. the rms value of the capacitor current is approximately ]. ) d 1 ( d ) d 1 )( 12 1 [( d i i 2 2 2 o cin ? + ? + = the power dissipated in the input capacitors is then p cin = i cin 2 r esr . for reliable operation, the maximum power dissipation in the capacitors should not result in more than 10 o c of temperature rise. many manufacturers specify the maximum allowable ripple current (arms) rating of the capacitor at a given ripple frequency and ambient temperature. the input capacitance should be high enough to handle the ripple current. it is common pratice that multiple capacitors are placed in parallel to increase the ripple current handling capability. 1 2 co l1 d1 1 2 cin vdc ro q1 resr rin i q1 i cin v esr v cin i q1 i cin v esr v cin 2 b 1 a 1 2 b 1 2 a 1 2 2 b 1 a 1 2 a 1 a 1 2 b 1 b 1 2 b 1 2 a 1 2 b 1 a 1 b 1 a 1 eq ) c c ( c c ) r r ( ) c r c r ( c c ) r r ( r r : ) ( r + + + + + + = = ) ( eq c 2 b 1 a 1 2 b 1 2 a 1 2 2 b 1 a 1 2 a 1 a 1 2 b 1 b 1 2 b 1 2 a 1 2 b 1 a 1 b 1 a 1 eq ) c c ( c c ) r r ( ) c r c r ( c c ) r r ( r r : ) ( r + + + + + + = = ) ( eq c applications information (cont.) ! " # " $ !%&'& ()* # " !%&'& + " , -! -! $ " " . ! ( ! %"- - # # # - /*& - /*& # - 0*& 1- *&2 / - /*& #- 0*& - /1- *&2/*& + +3 $4 +3 $ +3 $4 1 2 1 2# 5 +3 $4 1 3+2 $ 3+ ) ) + $ 3+ $ " # " +3 $4 " 6 " " +3 $ # +3 $ " +3 $ " $ " " 7 +3 $4 +3 $4 " # - 0*& - 0 *& +3 $ 2 8 "2 8 2 $ 14 ? 2005 semtech corp. www.semtech.com SC2545 power management t t t t t op switc op switc op switc op switc op switc h h h h h the rms value of the top switch current is calculated as the conduction losses are then p tc = i q1,rms 2 r ds(on) . r ds(on) varies with temperature and gate-source voltage. curves showing r ds(on) variations can be found in manufacturers? data sheet. from the si4860 datasheet, r ds(on) is less than 8m ? when v gs is greater than 10v. however r ds(on) increases by 50% as the junction temperature increases from 25 o c to 110 o c. the switching losses can be estimated using the simple formula where t r is the rise time and t f is the fall time of the switching process. different manufactures have different definitions and test conditions for t r and t f . to clarify these, we sketch the typical mosfet switching characteristics under clamped inductive mode in figure 9. figure 9. mosfet switching characteristics . f v i ) 1 )( t t ( p s in o 2 f r 2 1 ts + + = in figure 9, q gs1 is the gate charge needed to bring the gate-to-source voltage v gs to the threshold voltage v gs_th . q gs2 is the additional gate charge required for the switch current to reach its full-scale value i ds , . and q gd is the charge needed to charge gate-to-drain (miller) capacitance when v ds is falling. switching losses occur during the time interval [ t 1 , t 3 ]. defining t r = t 3 -t 1 and t r can be approximated as . v v r ) q q ( t gsp cc gt gd 2 gs r ? + = where r gt is the total resistance from the driver supply rail to the gate of the mosfet. it includes the gate driver internal impedance r gi , external resistance r ge and the gate resistance r g within the mosfet : r gt = r gi +r ge +r g . v gsp is the miller plateau voltage shown in figure 9. similarly an approximate expression for t f is . v r ) q q ( t gsp gt gd 2 gs f + = only a portion of the total losses p g = q g v cc f s is dissipated in the mosfet package. here q g is the total gate charge specified in the datasheet. the power dissipated within the mosfet package is . f v q r r p s cc g gt g tg = vgs miller plateau ids vds vgs th qgs1 qgs2 qgd t0 t1 t2 t3 gate charge volts vgs miller plateau ids vds vgs th qgs1 qgs2 qgd t0 t1 t2 t3 gate charge volts the total power loss of the top switch is then p t = p tc +p ts +p tg . if the input supply of the power converter varies over a wide range, then it will be necessary to weigh the relative importance of conduction and switching losses. this is because conduction losses are inversely propor- tional to the input voltage. switching loss however increases with the input voltage. the total power loss of mosfet should be calculated and compared for high-line and low-line cases. the worst case is then used for thermal design. applications information (cont.) ! " #$"% " #&"'% ( ) ( !#*)'% + ) * , % ( - .( ( ( /* ( 0 + (* . )1 ( % * ( . #2 . 1$&3& %4 * %51 51 4 . - + ( (6 , .% . ( ( - 7 ! % (#$& 1' - * + 7 ! ' ( % . % % (% .% ! ' 8 ( ( #29 . " %" % + ( )1 % - % / /% ## / (6 ! ! " # ! $ " % &'( % & )( $ *+, " $ - ./0 +1 /2/ 3 &(4 ! 51 467 1 # , 8 , 3 & (+ $ 9 9 $ # ! $ :1 &8( ; *+," " &2( < $ $ &/( 4 " " /9 $ &=(4 " " $ # 7 1#: $ !"#$ % !"#$ & '& ( ) * + & %& , - + & * . !"#$ & / - %% & + & * + & # & * & *(* * & * 0 % 1,2 30 * !"#$ %% 2 * / 4 * % 30 % 456 6 *& $ & !"#$7$ & 3 * (0$ 36 5$ + &' - % 3 , $ % 8 3 % 6 /9:; % & *& ' + & * / + % $ & !! !! "# !! $ !# %! %! !# $ !! "# ! % ! " !"#$!% & & & ' ( ) * !%+ , ' )-. , /// + + 0 0 0 0 & 0 && &0 1 ) ) 2 ' 20 ? 2005 semtech corp. www.semtech.com SC2545 power management typical characteristics ch1: tg1 ch2: bg1 ch3: tg2 ch4: bg2 gate waveform over current protection (5a/10mv) start up. ch1:tg ch2:bg ch3:tg ch4:bg shut down by pulling down en pin voltage. transient response(0-5a). ch1:tg ch2:bg ch3:vss ch4:vo ? peel off ? start up tracking by tieing ss1 and ss2 together. ch1:vi ch2:ven ch3:vss ch4:vo ch3:vo ch4:io vss vo1 vo2 vss vo1 vo2 21 ? 2005 semtech corp. www.semtech.com SC2545 power management efficiency curve for vout=3.3v. typical characteristics (cont.) operating frequency vs. rosc. rilim vs. ocp (vi=12v). freq. vs. temp. ( rosc=75kohm, vin=16v). vcc vs. vin ( ta=25 degree c). vcc vs. temp. 4 5 6 7 8 9 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 rilim( kohm) io(a) 50 100 150 200 250 300 350 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 ros c ( kohm) fsw(khz) 178 180 182 184 186 188 190 -40 -10 20 50 80 110 temperature (degree c) fs (khz) 9.5 9.7 9.9 10.1 10.3 10.5 10 12 14 16 18 20 22 24 26 28 30 vin (v) vcc (v) 10.03 10.05 10.07 10.09 10.11 10.13 -40-200 20406080100120 tj (degree c) vcc (v) 0% 20% 40% 60% 80% 100% 012345678910 io( a ) efficient vin=8v vin=16v 22 ? 2005 semtech corp. www.semtech.com SC2545 power management icc vs. vin (25 degreec). dl min ton vs. tj (vin=16v). dead time vs. tj (vin=16v, dh falling to dl rising). 5.0 5.5 6.0 6.5 7.0 8 10121416182022242628 vi n (v) icc (ma) 400 420 440 460 480 500 -40-20 0 20406080100120 tj (degree c) drvl min ton(ns) 0 20 40 60 80 100 -40-20 0 20406080100120 tj (degree c) dead time (ns) typical characteristics (cont.) 23 ? 2005 semtech corp. www.semtech.com SC2545 power management outline drawing - tssop-24 this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturing guidelines are met. notes: 1. (.222) (5.65) z g y p (c) 4.10 .161 0.65 .026 0.40 .016 1.55 .061 7.20 .283 x inches dimensions z p y x dim c g millimeters l (l1) c 01 gage plane see detail detail a a 0.25 .026 bsc .252 bsc 24 .004 .169 .303 .173 .307 .007 - 24 0.10 0.65 bsc 6.40 bsc 4.40 7.80 - .177 .311 4.30 7.70 .012 0.19 4.50 7.90 0.30 bxn 2x n/2 tips seating aaa c e/2 indicator pin 1 2x 1 3 2 n reference jedec std mo-153, variation ad. 4. inches b n ccc aaa bbb 01 e1 e l l1 e d c a2 a1 dim a min max millimeters min dimensions nom max nom e a a2 a1 e1 bbb c a-b d ccc c dimensions "e1" and "d" do not include mold flash, protrusions 3. or gate burrs. datums and to be determined at datum plane controlling dimensions are in millimeters (angles in degrees). -b- notes: 1. 2. -a- -h- side view (.039) .004 .008 - .024 - - - - 0 .018 .003 .031 .002 - 8 0 0.20 0.10 - 8 0.45 0.09 0.80 0.05 .030 .007 .047 .042 .006 - (1.0) 0.60 - 0.75 0.20 - - - 1.20 1.05 0.15 a b c d e e/2 h plane d land pattern - tssop-24 contact information semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805)498-2111 fax (805)498-3804 24 ? 2005 semtech corp. www.semtech.com SC2545 power management land pattern - mlpq-24 (4 x 4mm) semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805)498-2111 fax (805)498-3804 contact information outline drawing - mlpq-24 (4 x 4mm) e1 e bxn d/2 1 2 n e1 .100 .106 .110 2.55 2.70 2.80 pin 1 indicator 4.15 3.85 4.00 4.15 3.85 .157 .151 .163 .151 .163 aaa c a c (laser mark) d e b a1 a a2 seating plane lxn e/2 bbb c a b d1 inches .020 bsc b .007 bbb aaa n d1 e l e d .011 .100 dim a1 a2 a min .000 - .031 0.30 0.18 .012 0.25 .010 0.50 2.80 0.30 2.55 .004 .004 24 .016 .157 .106 .020 .110 0.10 0.10 24 0.40 4.00 2.70 0.50 bsc millimeters max 0.05 - 1.00 dimensions min 0.00 - nom (.008) .035 .001 max .002 - .040 nom 0.80 0.02 (0.20) 0.90 controlling dimensions are in millimeters (angles in degrees). coplanarity applies to the exposed pad as well as the terminals. notes: 2. 1. this land pattern is for reference purposes only. consult your manufacturing group to ensure your notes: 1. dim x y h k p c g millimeters inches (3.95) .010 .033 .122 .021 .106 .106 (.155) 0.25 0.85 2.70 0.50 2.70 3.10 dimensions company's manufacturing guidelines are met. 4.80 .189 z k g z h (c) x p top view bottom view |
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